Programmable input buffer

Details Programmable input buffer Programmable input buffer

1992-11-06

1994-08-23

Westin, Edward P.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307443, 307451, H03K 190185

Patent

active

053410459

ABSTRACT:
An input buffer capable of operating at a plurality of power supply levels. The input buffer of the present invention includes input logic that receives the data and has pull-up and pull-down devices that are coupled together in series as an inverter to generate a signal indicative of the data input. The input buffer also includes a mechanism for adjusting the strength of the pull-up and pull-down devices independent of each other so that the trip point and the propagation delay remain the same for the different power supply levels. This allows the input buffer to be CMOS and TTL compatible for all inputs. The input buffer also includes output logic which outputs the data in response to the signal from the input logic.

REFERENCES:
patent: 4717836 (1988-01-01), Doyle
patent: 4758746 (1988-07-01), Birkner et al.
patent: 4929853 (1990-05-01), Kim et al.
patent: 5097152 (1992-03-01), Kohda et al.

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