Coded data generation or conversion – Digital code to digital code converters – Serial to parallel
Patent
1995-12-29
1998-06-02
Gaffin, Jeffrey A.
Coded data generation or conversion
Digital code to digital code converters
Serial to parallel
326 39, H03K 17693
Patent
active
057607192
ABSTRACT:
A programmable I/O cell with a multiplicity of configurations and data conversion options implemented through the use of antifuses. Increased logic utilization and reduced number of components necessary to implement such designs by using the registers in the I/O cell to implement data conversion functions thereby saving the logic and registers of the FPGA logic cells for implementation of other functions is achieved. Serial-to-parallel and parallel-to-serial data conversion operations utilize adjacent registers in adjacent cells to perform shift operations.
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Cypress Semiconductor Corp.
Gaffin Jeffrey A.
Jean Pierre Peguy
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