Programmable high speed interface

Details Programmable high speed interface Programmable high speed interface

2008-01-01

2008-01-01

Lam, Tuan T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Current driver

C326S082000

Reexamination Certificate

active

11446483

ABSTRACT:
Methods and apparatus for providing either high-speed, or lower-speed, flexible inputs and outputs. An input and output structure having a high-speed input, a high-speed output, a low or moderate speed input, and an low or moderate speed output is provided. One of the input and output circuits are selected and the others are deselected. The high-speed input and output circuits are comparatively simple, in one example having only a clear signal for a control line input, and are able to interface to lower speed circuitry inside the core of an integrated circuit. The low or moderate speed input and output circuits are more flexible, for example, having preset, enable, and clear as control line inputs, and are able to support JTAG boundary testing. These parallel high and lower speed circuits are user selectable such that the input output structure is optimized between speed and functionality depending on the requirements of the application.

REFERENCES:
patent: 4983860 (1991-01-01), Yim et al.
patent: 5572467 (1996-11-01), Ghassemi et al.
patent: 5600271 (1997-02-01), Erickson et al.
patent: 5751164 (1998-05-01), Sharpe-Geisler et al.
patent: 5764080 (1998-06-01), Huang et al.
patent: 5929655 (1999-07-01), Roe et al.
patent: 5970255 (1999-10-01), Tran et al.
patent: 6218858 (2001-04-01), Menon et al.
patent: 6236231 (2001-05-01), Nguyen et al.
patent: 6246258 (2001-06-01), Lesea
patent: 6252419 (2001-06-01), Sung et al.
patent: 6271679 (2001-08-01), McClintock et al.
patent: 6304106 (2001-10-01), Cecchi et al.
patent: 6356105 (2002-03-01), Volk
patent: 6388495 (2002-05-01), Roy et al.
patent: 6400177 (2002-06-01), Yoshizaki
patent: 6433579 (2002-08-01), Wang et al.
patent: 6472904 (2002-10-01), Andrews et al.
patent: 6480026 (2002-11-01), Andrews et al.
patent: 6777980 (2004-08-01), Young et al.
patent: 6825698 (2004-11-01), Wang et al.
patent: 41 12 077 (1992-10-01), None
patent: 0 818 734 (1996-05-01), None
patent: 02-044828 (1990-02-01), None
patent: 07-264026 (1995-10-01), None
patent: 08-102492 (1996-04-01), None
US 5,079,893, 01/1992, Miller (withdrawn)
“Virtex-II 1.5V Field Programmable Gate Arrays”, XILINX, Advance Product Specification, Apr. 2, 2001, pp. 1-36.
“Apex II Programmable Logic Device Family”, ALTERA Corporation, May 2001, pp. 1-8, 38-59.
“Apex 20K Programmable Logic Device Family”, ALTERA Corporation, May 2001, pp. 1-8, 37-47.
“Virtex-E 1.8V Field Programmable Gate Arrays”, XILINX, Preliminary Product Specification, Nov. 9, 2001, pp. 1-3, 30-52.
“Mercury Programmable Logic Device Family”, ALTERA Corporation, Mar. 2002, pp. 1-2, 47-60.
“Apex 20KC Programmable Logic Device”, ALTERA Corporation, Apr. 2002, pp. 1-6, 36-48.

Affiliated with

Also associated with

Rating

Programmable high speed interface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Programmable high speed interface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Programmable high speed interface will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3943423