Programmable high-resolution phase delay

Details Programmable high-resolution phase delay Programmable high-resolution phase delay

2007-11-01

2009-08-11

Luu, An T (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Phase shift by less than period of input

C327S158000, C327S234000, C327S243000

Reexamination Certificate

active

07573311

ABSTRACT:
A programmable delay lock loop system provides a delayed output signal having a programmed delay from an input signal. A phase detector provides a phase delay signal indicative of an actual phase difference between the input signal and the delayed output signal. An accumulator provides a delay command signal as a function of a difference between a commanded delay and the actual phase difference. A programmable phase delay circuit is configured to generate a ramp signal based upon the input signal, to adjust the ramp signal with respect to a threshold level in response to the delay command signal, to generate a trigger signal based upon a comparison of the ramp signal with the threshold level, and to clock the delayed output signal in response to the trigger signal.

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