Programmable frequency divider with symmetrical output

Details Programmable frequency divider with symmetrical output Programmable frequency divider with symmetrical output

2005-11-01

2005-11-01

Wambach, Margaret R. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

C377S047000, C377S048000, C327S115000, C327S117000, C708S252000

Reexamination Certificate

active

06961403

ABSTRACT:
A programmable frequency divider circuit with symmetrical output is disclosed. The frequency divider includes a non-symmetrical LFSR based component operated in series with a symmetrical divider component. Both the LFSR and the symmetrical divider may be programmed to provide flexibility. The frequency divider can dynamically adjust the divisor of the LFSR component to overcome limitations in the divide resolution due to the series combination of dividers, providing even and odd divisor values. The divider architecture can also provide higher level functions, including synchronization of multiple divider outputs, dynamic switching of divisor values and generation of multi-phased and spaced outputs. The linear feedback shift register (LFSR) component includes a feedback logic network decomposed into multiple stages to realize a maximum latch-to-latch operational latency of one gate delay regardless of the size of the LFSR.

REFERENCES:
patent: 5065415 (1991-11-01), Yamashita
patent: 5349622 (1994-09-01), Gorisse
patent: 5948046 (1999-09-01), Hagberg
patent: 6057719 (2000-05-01), Austin et al.
patent: 6459310 (2002-10-01), Thomson et al.
patent: 6700446 (2004-03-01), Ke

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