Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2002-09-26
2004-05-25
Nguyen, Long (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S112000, C326S083000
Reexamination Certificate
active
06741106
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to circuits.
2. Description of the Related Art
Modern integrated circuits or chip technology utilizes a number of logic circuits implemented with transistor technology. For example, Field Effect Transistors (FET's) and Complementary Metal-Oxide Semiconductors (CMOS) are often used. The logic circuits are combined and implemented in microprocessors, memories and application specific integrated circuits (ASICs). The microprocessors, memories and ASICS are typically implemented in a chip, which may then be implemented in a larger circuit such as a circuit board. Pins are used to connect between the chip and the circuit board. The pins often make contact with a metal contact on the circuit board known as a pad. As a result, signals may be communicated between the chip and the larger circuit board through the pin and pad.
There is often a need to communicate different signals between the chip and the circuit board using the same pin and pad. Communicating signals off of the chip and onto the pad is known as driving the pad. The circuits that generate these signals are often referred to as pad drivers or pad driving circuits. For example, there may be a need to drive a pad with different signals such as a first signal with a first voltage and a second signal with a second voltage.
To accomplish this objective, modern designers often use a mixture of different logic elements (e.g., FET's). For example, conventional implementations may use two different types of FET's. The first type of FET is a high voltage FET which can tolerate large voltage swings. The high voltage FET is optimized to handle the large voltage swings and to tolerate the outside environment, since there is a need to communicate with the outside world (e.g. circuit board). The second type of FET is a low voltage FET used internally to the chip. The low voltage FET is typically optimized for speed. The various FET's are relatively large devices that carry a large amount of capacitance. As a result, there is a need for a pre-driver to drive these FET's. However, with conventional technology it is difficult to implement a single type of pre-driver, which has good performance and can properly produce a low voltage signal as well as a high voltage signal.
In prior art systems a single type of pre-drive circuit is implemented to drive the lower voltage as well as the higher voltage. However, the high voltage FET's do not work well at the lower voltage, therefore performance is degraded in the pre-drive circuit. In addition, the low voltage FET's have to tolerate high voltage without sustaining damage to the FET. As a result, it is costly and complicated to introduce both high voltage FET's and low voltage FET's in the same design. Lastly, with the advent of modern designs, the difference between the required high voltage and low voltage is a 2× difference, where it was previously less than 1× difference.
Thus there is a need in the art for a pad driver, which can produce both high voltages and low voltages. There is a need for a pad driver implemented with high voltage FET's and optimized to produce both high voltages and low voltages. Lastly, there is a need for a pad driver that can produce a high voltage that is a multiple of two times the low voltage, using high voltage FET's.
SUMMARY OF THE INVENTION
In one embodiment of the present invention, input/output or pad drivers are developed which are used to produce at least two distinct output voltages from a chip. In another embodiment of the present invention, the output voltages have a large voltage range such as a 2× voltage swing. For example, a low voltage of 1.5 volts and a high voltage of 3.3 volts are implemented. In the present invention, a pad driver is optimized to produce a low voltage of 1.5 volts and a high voltage of 3.3 volts. Since the pad driver is programmed to produce 3.3 volts or 1.5 volts, high voltage FET's are implemented to accommodate this voltage range.
The pad driver implemented in accordance with the teachings of the present invention uses at least two pre-driver circuits to accommodate large voltage swings. Both pre-drivers are optimized to accommodate both high and low voltage swings. During one mode of operation a high voltage path in each pre-driver circuit is disabled when generating a low voltage signal and a low voltage path in each pre-driver circuit is disabled when generating a high voltage signal.
In another embodiment of the present invention a method of operating a pad driver comprises the steps of generating an input signal; generating a first voltage from a first pre-driver in response to the input signal, the first voltage driving a first device and causing the first device to operate producing a first signal; generating a second voltage from a second pre-driver in response to the input signal, the second voltage driving a second device and causing the second device to operate producing a second signal; and generating an output voltage in response to the first signal and in response to the second signal.
In one embodiment of the present invention, a pad driver comprises an input generating an input signal; a first pre-driver coupled to the input and generating a first pre-driver signal in response to the input signal from the input; a second pre-driver coupled to the input and generating a second pre-driver signal in response to the input signal from the input; a first output device coupled to the first pre-driver and generating a first output signal in response to the first pre-driver signal generated by the first pre-driver; a second output device coupled to the second pre-driver and generating a second output signal in response to the second pre-driver signal generated by the second pre-driver; and an output node coupled to the first output device and coupled to the second output device, the output node generating a pad signal in response to the first output signal generated by the first output device and in response to the second output signal generated by the second output device.
The pad driver comprises a first enable input generating an enable signal; a second enable input generating a compliment to the enable signal; the first pre-driver coupled to the enable input and the compliment input and generating the first pre-driver signal in response to the enable signal and in response to the compliment of the enable signal.
The pad driver further comprises an enable input generating an enable signal; and a compliment input generating a compliment to the enable signal; the second pre-driver coupled to the enable input and the compliment input and generating the second pre-driver signal in response to the enable signal and in response to the compliment of the enable signal.
The first pre-driver comprises an input generating input information; an inverting level shifter coupled to the input and generating inverted input information; a tri-state inverter coupled to the inverting level shifter and generating first state information in response to the inverted input information; a tri-state buffer coupled to the input and generating second state information in response to the input information; and an output node coupled to the tri-state inverter and coupled to the tri-state buffer, the output node generating output information in response to the first state information and in response to the second state information.
The second pre-driver comprises an input generating input information; an inverting level shifter coupled to the input and generating inverted input information; a tri-state inverter coupled to the inverting level shifter and generating first state information in response to the inverted input information; a tri-state buffer coupled to the input and generating second state information in response to the input information; and an output node coupled to the tri-state inverter and coupled to the tri-state buffer, the output node generating output information in resp
Agilent Technologie,s Inc.
Nguyen Long
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