Programmable divider with controlled duty cycle

Details Programmable divider with controlled duty cycle Programmable divider with controlled duty cycle

1997-08-04

1999-11-16

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Pulse multiplication or division

H03K 2100

Patent

active

059870893

ABSTRACT:
A programmable divider or prescaler divides an input signal by a divisor of two raised to the m.sup.th -power plus one, (2.sup.m +1), where m is an integer, and n is a value between zero and two raised to the m.sup.th -power minus one, (2.sup.m -1). When m is equal to 3, the duty cycle is between 44% and 56%. The divider can be utilized in communication applications for providing radio frequency source signals. The duty cycle is maintained around 50% for use with balanced mixers.

REFERENCES:
patent: 5077686 (1991-12-01), Rubinstein
patent: 5127036 (1992-06-01), Pham
patent: 5526391 (1996-06-01), Shankar et al.

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