Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Pulse multiplication or division
Patent
1993-09-14
1994-12-06
Callahan, Timothy P.
Electrical pulse counters, pulse dividers, or shift registers: c
Systems
Pulse multiplication or division
377 39, 377 52, 327115, H03K 2100
Patent
active
053717724
ABSTRACT:
A programmable clock divider in which a system reference clock signal is divided by a programmed integer value. A storage register stores a value equal to the desired divisor minus two. A stored value of zero results in a divide by two. The stored value is loaded into a compare register and a counter is implemented to count reference clock signals. The compare register value and the counter value are compared by a comparator logic circuit. When the two values are equal, a flip-flop is toggled to switch the prescale clock value output, The flip-flop control logic includes circuitry for ensuring that odd divides exhibit an output clock frequency having a 50/50 duty cycle by controlling the flip-flop toggle to coincide with system clock edges. The flip-flop control logic also controls the timing for loading and resetting the compare and counter logic, respectively.
REFERENCES:
patent: 3746891 (1973-07-01), Rowe
patent: 4704723 (1987-11-01), Markland
patent: 4737984 (1988-04-01), Brown
patent: 4989223 (1991-01-01), Katayose et al.
patent: 5177771 (1993-01-01), Glassburn
patent: 5256994 (1993-10-01), Langendorf
Callahan Timothy P.
Intel Corporation
Le Dinh
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