Pulse or digital communications – Receivers – Interference or noise reduction
Patent
1994-04-11
1996-08-13
Chin, Stephen
Pulse or digital communications
Receivers
Interference or noise reduction
3647241, H04B 110, G06F 1717
Patent
active
055464319
ABSTRACT:
A shifter circuit of a digital filter circuit for providing an adjustable correction coefficient (.beta.) for the digital filter is described. The shifter circuit includes a first shifter for providing a first shift amount (S.sub.1) to an input signal, and a second shifter for providing a second shift amount (S.sub.2) to the input signal. Logic circuitry is provided in the shifter circuit that is coupled to the first and second shifters for receiving outputs of the first and second shifters under control of a control signal to generate an output signal of the shifter circuit with the adjustable correction coefficient (.beta.) such that digital filter has an adjustable bandwidth (BW) that is adjusted at a fine and substantially equal bandwidth increment. The adjustable correction coefficient (.beta.)is selectively derived from a combination of 2.sup.-S1 and 2.sup.-S2 such that the adjustable bandwidth (BW) is obtained from the equation: BW=-In(1-.beta.)/2.pi.T.sub.P.
REFERENCES:
patent: 4975702 (1990-12-01), Bazes
patent: 4980585 (1990-12-01), Bazes
patent: 5036230 (1991-07-01), Bazes
patent: 5103466 (1992-04-01), Bazes
patent: 5325318 (1994-06-01), Harris et al.
Chin Stephen
Intel Corporation
Kim Kevin
LandOfFree
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