Programmable digital filter implementation for...

Details Programmable digital filter implementation for... Programmable digital filter implementation for...

2006-01-03

2006-01-03

Chaki, Kakali (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

06983299

ABSTRACT:
A circuit generally comprising a first circuit and a second circuit. The first circuit may be configured to (i) detect a state of an input signal and (ii) present a plurality of intermediate signals each representative of the state of the input signal during a plurality of clock cycles. The second circuit may be configured to present a filtered signal in response to a selected number of the intermediate signals having a predetermined state.

REFERENCES:
patent: 4587620 (1986-05-01), Niimi et al.
patent: 4641259 (1987-02-01), Shan et al.
patent: 4722093 (1988-01-01), Tejima
patent: 4856030 (1989-08-01), Batzer et al.
patent: 5648777 (1997-07-01), Bays et al.
patent: 6389438 (2002-05-01), Zhou
patent: 6574592 (2003-06-01), Nankawa et al.
patent: 6760372 (2004-07-01), Zortea et al.

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