Programmable data path device

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3649314, 3649371, G06F 1520, G06F 1531

Patent

active

048398519

ABSTRACT:
A programmable data path device capable of operating as a general purpose hardware accelerator. The device includes a plurality of processing cells, memory such as RAM or EPROM for storing data path control words, and an address module for sequentially providing data path control words to the processing cells. Each cell includes an ALU, a multiplexer and a register. For each cell, in response to the data path control word, the multiplexer selectively couples the contents of one register to one of the ALU input ports, and the ALU performs a selected operation and places its output into the register of that cell. Thus, through the data path control words, a device can be configured to operate in a sequential, pipeline, or parallel mode, permitting a wide variety of digital signal processing functions to be performed with a single system.

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