Programmable counter system

Details Programmable counter system Programmable counter system

1983-05-23

1985-10-01

Heyman, John S.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

With programmable counter

377 33, 377 44, 377 48, H03K 2136

Patent

active

045450633

ABSTRACT:
A programmable counter system of the swallow operation type using binary counters is disclosed. The counter comprises a prescaler for frequency dividing an input signal by a frequency division factor "2.sup.n -1" or "2.sup.n ", upper and lower order bit counters for counting down an output signal from the prescaler, a flip-flop for selecting either the frequency division factor "2.sup.n -1" or "2.sup.n " according to the logical level of the output signal of the counter A or B, and inverters for level inverting programming data and applying them to the lower order bit counter A, thereby setting a division number of the counter A to a complement of the binary code of the programming data.

REFERENCES:
patent: 3976946 (1976-08-01), Schroder
patent: 4084082 (1978-04-01), Alfke
patent: 4184068 (1980-01-01), Washburn
patent: 4468797 (1984-08-01), Shin
Suzuki et al., "Electronic Science", Jul. issue 1978, pp. 69-80.

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