Programmable compensating device to optimize performance in a DR

Details Programmable compensating device to optimize performance in a DR Programmable compensating device to optimize performance in a DR

1996-05-13

1998-07-14

Heckler, Thomas M.

395558, G06F 116

Patent

active

057817669

ABSTRACT:
A programmable compensating device for optimizing performance in a DRAM controller chipset, comprising process monitors for measuring process speeds of integrated circuits in the chipset, evaluation means for comparing the measured process speeds and identifying a slowest integrated circuit, and delay modules for reducing measured process speeds as necessary to match the process speed of the slowest integrated circuit, whereby DRAM access time is minimized to permit more frequent DRAM accesses, thereby optimizing chipset performance.

REFERENCES:
patent: 4421996 (1983-12-01), Chuang et al.
patent: 5329254 (1994-07-01), Takano

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