Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons
Patent
1983-12-06
1986-08-12
Miller, Stanley D.
Electrical transmission or interconnection systems
Nonlinear reactor systems
Parametrons
307441, 307446, 307451, 307466, 307469, 307570, 307585, 307252A, 357 38, 357 43, H03K 1712
Patent
active
046058729
ABSTRACT:
A programmable circuit is described which is particularly well suited for programming or customizing redundant elements in CMOS integrated circuits. This programmable circuit, which is formed on a semiconductor substrate together with a redundant semiconductor device, uses a parasitic switching device on the semiconductor substrate to deselect the redundant semiconductor device in response to a programming signal. The programmable circuit includes an input terminal to receive the programming signal, a parasitic SCR formed on the semiconductor substrate and coupled to the input terminal and a deselect device such as a fuse or antifuse to deselect the redundant semiconductor device. The parasitic SCR is actuated in response to the programming signal and the deselect device is connected to the SCR and the semiconductor device to deselect the semiconductor device from the redundant electrical circuit in response to the actuation of the SCR by the programming signal.
REFERENCES:
patent: 3792319 (1974-02-01), Tsang
patent: 4122547 (1978-10-01), Schoeder et al.
patent: 4130889 (1978-12-01), Chua
patent: 4192016 (1980-03-01), Taylor
patent: 4199731 (1980-04-01), Taylor et al.
patent: 4399372 (1983-08-01), Tanimoto et al.
patent: 4417154 (1983-11-01), Kuo
Ewald et al., "Fusible Link Device", IBM Tech. Disc. Bull., vol. 19, No. 8, Jan. 1977, pp. 3089-3090.
J. Tihanyi, "Functional Integration of Power MOS and Bipolar Devices", IEEE, 1980, pp. 75-78.
L. Leipold et al., "A FET-Controlled Thyristor in SIPMOS Technology", IEEE, 1980, pp. 79-82.
K. Kokkonen et al., "Redundancy Techniques for Fast Static RAMs", 1981 IEEE International Solid-State Circuits Conference, pp. 80-81.
D. Greve, "Programming Mechanism of Polysilicon Resistor Fuses", IEEE Transactions on Electron Devices, vol. ED-29, No. 4, Apr. 1982, pp. 719-724.
D. Greve et al., "Polysilicon n+p-n+ Structures for Memory Redundancy", IEEE Transactions on Electron Devices, vol. ED-29, No. 8, Aug. 1982, pp. 1313-1318.
T. Mano et al., "A 256K RAM Fabricated with Molybdenum-Polysilicon Technology", 1980 IEEE International Solid-State Circuits Conference.
R. Cenker et al., "A Fault-Tolerant 64K Dynamic RAM", 1979 IEEE International Solid-State Circuits Conference.
Hudspeth D. R.
Miller Stanley D.
Tokyo Shibaura Denki Kabushiki Kaisha
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