Programmable clock tuning system and method

Details Programmable clock tuning system and method Programmable clock tuning system and method

1993-11-19

1995-10-03

Heckler, Thomas M.

G06F 104

Patent

active

054559316

ABSTRACT:
A clock tuning system and method for a data processing system with enhanced timing failure diagnostics and unlayering capabilities. Both common and individual phase adjusting capabilities ensure programmable tuning of clock pulses distributed throughout a computer system, thereby facilitating isolation of timing margin failure to specific clock signals or enhancing system performance by shifting timing margin between logic paths. Both single-clock and dual-clock data processing are discussed, as well as clock tuning embodiments for each.

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