Programmable clock generator

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307465, G06F 104

Patent

active

047455730

ABSTRACT:
A programmable clock generator includes programmable logic arrays implementing a shift register and control circuits elements connected between the inputs and outputs of the shift register elements and responsive to a code applied thereto for skipping preselected shift register elements during shifting. At least one JK flip-flop is receptive of timing signals from non-skipped shift register elements at the J and K inputs thereof to produce a clock signal at the output thereof.

REFERENCES:
patent: 4257108 (1981-03-01), Igel
patent: 4321687 (1982-03-01), Parsons et al.
patent: 4575794 (1986-03-01), Veneski et al.

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