Programmable circuit for realizing a digital filter

Details Programmable circuit for realizing a digital filter Programmable circuit for realizing a digital filter

1998-12-15

2001-08-21

Mai, Tan V. (Department: 2121)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S320000

Reexamination Certificate

active

06279020

ABSTRACT:

The present invention relates to a programmable co-processor circuit intended for use in conjunction with a main processor so as to form a digital filter, which circuit comprises a plurality of filter processing elements controlled by a control unit and each including an input data register having a read output connected to an input of at least one adder, at least one multiplier having an input connected to a result output of the adder and having another input connected to a read output of a coefficient memory, and having a result output connected to an input of a final adder having an output which supplies an intermediate result of the calculation of an equation upon each cycle of a clock.
Such a circuit is notably used in applications where a plurality of filters is required, such as various so-called “multimedia” applications, for example for the reduction of intersymbol interference, for changing the data rate, or for the reduction of noise introduced by a communication channel.
A digital filter essentially comprises a series of elements between which signals are extracted, which signals are processed, notably multiplied by a coefficient and/or added, and are subsequently re-injected. To realize digital filters three methods are known:
using a processor of the DSP type, to form a filter with the aid of specialized algorithms; although this method provides great flexibility it is limited as regards the filter performance, particularly as regards its speed,
using dedicated circuits which directly form filters; this enables a high performance to be achieved but leads to the development of many different circuits,
using specialized but programmable circuits; this is a satisfactory compromise between the high performance of dedicated circuits and the high flexibility of a DSP processor; specialized programmable filters include programmable filters using a processor, which means that they are essentially constituted by a DSP processor stripped down to the minimum necessary for the process to be performed in a filter. This is the most interesting solution.
A specialized programmable circuit comprises registers for the storage of programmable coefficients. It is generally configured to realize a given type of filter: symmetrical, half-band, interpolation, decimation, adaptive, complex. Such a programmable filter comprising a processor is known from the document EP 0 732 809. The processor in accordance with said document is capable of calculating two filters arranged in cascade and having the same clock frequency. It uses two registers for alternately storing the partial results of the two filters.
It is an object of the invention to provide a programmable circuit which enables multiplexing of different types of filter, even when they have different data formats and different data input rates.
To this end, for multiplexing a plurality of different filters, each filter processing element further comprises a number of partial-result registers, which number is equal to the desired number of filters to be multiplexed, each register has a write input connected to the output of the final adder, and each register has a read output connected to one of the inputs of the final adder.
Thus, a plurality of filters having different data formats, real or complex, can be processed.
Other special embodiments of the invention are defined in the claims
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REFERENCES:
patent: 5886912 (1999-03-01), Miyake et al.
patent: 5933797 (1999-08-01), Håakansson et al.
patent: 5956262 (1999-09-01), Comminges et al.
patent: 0732809A1 (1996-09-01), None
“VLSI Programmable Digital Filter For Video Signal Processing”, Journal of VLSI, pp. 220-231, 1993.

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