Programmable cache memory which associates each section of main

Details Programmable cache memory which associates each section of main Programmable cache memory which associates each section of main

1993-02-12

1994-03-22

Dixon, Joseph L.

Boots, shoes, and leggings

395400, 364DIG1, 36424341, 3642469, G06F 1300

Patent

active

052972704

ABSTRACT:
A system includes a main memory having a plurality of sections which each include a plurality of selectively addressable storage locations, a cache memory, and an accessing arrangement for successively requesting data from respective locations in the main memory. A method and apparatus for controlling the system involve assigning each section of the main memory a changeable status condition which is one of a caching enabled status and a caching disabled status, and inhibiting reading and storing of data by the cache memory when data requested by the accessing unit is in one of the sections of the main memory having the caching disabled status. An alternative method and apparatus for controlling the system involve selective operation in a mode in which data in the cache memory is updated even when reading of data from the cache memory is inhibited.

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