Programmable broadcast initialization of memory blocks

Details Programmable broadcast initialization of memory blocks Programmable broadcast initialization of memory blocks

2005-09-06

2005-09-06

Tan, Vibol (Department: 2819)

Static information storage and retrieval

Addressing

Plural blocks or banks

C365S230010, C365S230050, C365S189080, C326S038000, C326S041000

Reexamination Certificate

active

06940779

ABSTRACT:
Systems and methods are disclosed herein to initialize memory blocks of a programmable logic device. For example in accordance with an embodiment of the present invention, a system bus extension is provided for the memory blocks that functions as a unidirectional broadcasting write bus. A read bus may also be provided to read data stored in the memory blocks.

REFERENCES:
patent: 5802003 (1998-09-01), Iadanza et al.
patent: 5914906 (1999-06-01), Iadanza et al.
patent: 6127843 (2000-10-01), Agrawal et al.
patent: 6483342 (2002-11-01), Britton et al.
patent: 6772230 (2004-08-01), Chen et al.
U.S. Appl. No. 09/864,290, filed May 25, 2001 entitled Field Programmable Gate Array (FPGA) Bit Stream Format.

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