Programmable bonding pad with sandwiched silicon oxide and silic

Details Programmable bonding pad with sandwiched silicon oxide and silic Programmable bonding pad with sandwiched silicon oxide and silic

1988-02-12

1990-08-14

LaRoche, Eugene R.

357 44, 357 51, 357 2313, 357 54, H01L 2702, H01L 2934, H01L 2978

Patent

active

049491504

ABSTRACT:
The present invention is a bonding pad structure and method for making the same which can be connected at the metalization step to form passive or active devices in addition to forming a bonding pad. A P-doped region is formed in an epitaxial layer in the area of the bonding pad at the perimeter of a chip. This P-doped region allows the formation of a junction capacitance between it and the epitaxial layer. In addition, by adding an oxide layer over the P-doped region an oxide capacitor can be formed between the metal bonding pad and the P-doped region with the oxide as the dielectric. The oxide layer is a special sandwich of two layers, silicon dioxide and silicon nitride. The sandwiched layers protects the components beneath the bonding pad. The P-doped region can also be used as a resistance by providing metal connections to both ends. Finally, a vertical PNP transistor can be formed between the P-doped region, the epitaxial layer and a P-doped substrate.

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Davis, "Bipolar Design Considerations for the Automotive Environment", Journal of Solid State Circuits, vol. SC8, No. 6, Dec. 1973, pp. 419-426.

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