Programmable bit shift circuit

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364900, G06F 700

Patent

active

043833047

ABSTRACT:
A programmable bit shift circuit in which data can be shifted in one operation by as many bit positions as desired, m input data lines and n output data lines are provided intersecting each other with n>m. Switching elements such as transmission gates are provided at intersections of the input and output data lines. The control electrodes of switching elements at the intersections of the first through m-th input data lines and the j-th through (j+m-l)-th output data lines for each integer value of j equal to or less than (n-m+l) are interconnected. Shift control signals are coupled to the interconnected control electrodes.

REFERENCES:
patent: 3076181 (1963-01-01), Newhouse et al.
patent: 3818203 (1974-06-01), Perlowski et al.
patent: 3887799 (1975-06-01), Lindgren
patent: 3961750 (1976-06-01), Dao
patent: 3989955 (1976-11-01), Suzuki
patent: 4051358 (1977-09-01), Schwartz
Gersbach, "Algebraic/Logical Shift Matrix", IBM Tech. Disclosure Bulletin, vol. 23, No. 1, Jun. 1980, pp. 120-122.
Gersbach, "High-Speed Shifter Array", IBM Tech. Disclosure Bulletin, vol. 21, No. 4, Sep. 1978, pp. 1379-1380.

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