Programmable bandwidth and frequency slewing for phase-lock...

Details Programmable bandwidth and frequency slewing for phase-lock... Programmable bandwidth and frequency slewing for phase-lock...

2006-02-14

2006-02-14

Le, Dinh T. (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S156000, C331S016000

Reexamination Certificate

active

06998890

ABSTRACT:
A phase-lock loop which includes an oscillator having an oscillator signal whose frequency is related to a received error correction signal and phase-frequency detector receiving and comparing the oscillator signal and a reference signal from the master circuit and generating the error correction signal based on the phase difference of the oscillator signal and the reference signal. A first window circuit counts the number of comparing cycles of the detector and provides a first window signal for the transmission of the error correction signals from the detector to the oscillator at a frequency of a predetermined number of counted comparing cycles. A second window circuit which, in response to at least the oscillator signal, narrows the first window signal to limit the duration of the correction signal for irregular reference signals.

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patent: 2003/0185329 (2003-10-01), Dickmann
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International Search Report for PCT/US 03/31316 dated Apr. 20, 2004.

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