Programmable asynchronous register initialization circuit

Details Programmable asynchronous register initialization circuit Programmable asynchronous register initialization circuit

1984-07-20

1987-08-04

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307445, 307458, 307466, 365 95, 377 77, H03K 1920, H03K 19084, G06F 738, G11C 1900

Patent

active

046848266

ABSTRACT:
A circuit constructed in accordance with this invention includes means for asynchronously forcing a flip-flop (70) or a register to a programmable logical state in response to an initialization input signal (I). In one embodiment, a D-type flip-flop (70) is provided having data input terminal (71), a clock input terminal (77), a data output terminal (103), an initialization input terminal (41), and a programming input terminal (11). When an initialization input signal I is received, a predefined output signal is immediately placed on the data output terminal (103). The predefined output signal is defined by the status of a fuse (13), which is opened, if desired, via the programming input terminal (11). When an initialization input signal is not received, the flip-flop (70) operates as a normal D-type flip-flop.

REFERENCES:
patent: 3609569 (1970-07-01), Todd
patent: 4277698 (1981-07-01), Vasquez
patent: 4446534 (1984-05-01), Smith

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