Coded data generation or conversion – Analog to or from digital conversion – With particular solid state devices
Utility Patent
1998-09-23
2001-01-02
Williams, Howard L. (Department: 2819)
Coded data generation or conversion
Analog to or from digital conversion
With particular solid state devices
Utility Patent
active
06169503
ABSTRACT:
BACKGROUND
1. Field of the Invention
This invention relates to converters such as analog-to-digital converters, digital-to-analog converters, and general signal converters and relates to use of non-volatile semiconductor memory cells in a converter to provide linear, non-linear, or user programmable conversions of signals.
2. Description of Related Art
Many systems convert signals from one format to another. For example, audio and image processing systems often use analog-to-digital converters (ADCs) to convert analog audio or image signals to digital samples for digital processing and subsequently uses digital-to-analog converters (DACs) to convert processed digital data to analog signal to be played or displayed. Some memory systems also use ADCs and DACs. For example, U.S. Pat. No. 5,745,409, entitled “Non-Volatile Memory with Analog and Digital Interface and Storage”, which is hereby incorporated by reference in its entirety, describes memory systems that store both digital and analog data and include ADCs and DACs for data conversions. As described in U.S. Pat. Nos. 5,638,320 and 5,745,409, some multiple-bit-per-cell memories include a DAC that converts an input multi-bit digital signal representing data into a voltage (or an analog signal) that controls programming of a threshold voltage in a memory cell to store the data in the memory cell. In such memories, reading determines the threshold voltage of the memory cell, and an ADC converts the threshold voltage to the original digital data.
FIG. 1
is a block diagram of a conventional ADC
100
that includes a reference voltage source
110
, comparators
120
, and an encoder
130
. In ADC
100
, reference voltage source
110
includes series connected resisters R
0
to Rx that generate x reference voltages V
0
to Vx where x is equal to 2
n
−1. To convert an analog input signal Ain into an n-bit digital output signal Dout, comparators
120
simultaneously compare analog signal Ain to reference voltages V
0
to Vx. Each comparator
120
asserts an associated one of binary signals C
0
to Cx to encoder
130
if the reference voltage input to the comparator is greater than the voltage of signal Ain, and encoder
130
provides digital output signal Dout with a value that depends on which of signals C
0
to Cx that are high. The number of comparators (x) in ADC
100
depends exponentially on the number of bits (n) in signal Dout. Accordingly, for applications requiring a large number of bits, ADC
100
requires many comparators, and the circuit area and power required for ADC
100
can be significant.
DACs are generally less complex than ADCs.
FIG. 2
shows a DAC
200
including a reference voltage source
110
, a decoder
230
that receives a digital input signal Din, and transistors
220
coupled between reference voltages V
0
to Vx and a terminal for an analog output signal Aout. To perform a digital-to-analog conversion, converter
220
receives digital input signal Din and selects and turns on a transistor
220
that corresponds to the value of signal Din. Accordingly, analog output signal Aout has a voltage equal to the one of reference voltages V
0
to Vx that corresponds to the selected transistor
220
.
Many other implementations of ADCs and DACs are known. For example, some ADCs and DACs use switched capacitance and successive approximation techniques. Generally, these converters require substantial overhead and circuit area. Some types of DACs which may occupy less circuit area than DAC
200
employ amplifiers and resistors. For example, an amplifier having resistors R
0
to R(n−1) connected to form an analog adder can generate an analog output signal Aout having voltage is linearly proportional to the value that bit signals D
0
to D(n−1) applied to the resistors represent. For this, each resistor Ri for i from 0 to n−1 has a resistance 2
i
*R where R is a constant resistance. In an integrated circuit, constructing resistors R
0
to R(n−1) that have precise relative resistances over the broad range required when n is large can be difficult.
Another difficulty is that some applications require a DAC and an ADC that precisely match each other. Specifically, some multiple-bits-per-cell memories require an ADC that precisely inverts a conversion that a DAC performs so that the results of an analog-to-digital conversion following a digital-to-analog conversion does not change an input digital data value. This requirement can add to the difficulty in manufacturing resistors having the appropriate resistances. Using the same reference voltage source
110
for both DAC
200
and ADC
100
simplifies matching of the conversions, but still requires the large circuit area and high power draw for the many comparators
120
in ADC
100
.
Current systems need converters that have small circuit area for low manufacturing cost, have high speed and low power requirements for low power and portable systems, can be easily constructed, can be easily matched to converters that perform inverse conversions, and can be easily embedded in integrated circuits providing a true system-within-a-chip with analog and digital capabilities.
SUMMARY
In accordance with the invention, converters such as digital-to-analog converters (DACs) and analog-to-digital converters (ADCs) use conversion arrays containing non-volatile memory or reference cells having a set of threshold voltages that provide references for conversions. A conversion array may be divided into multiple subsets of the reference cells where each reference cell in a subset corresponds to a digital value and has a threshold voltage that is equal to the analog voltage that a conversion maps to the digital value. An ADC applies an analog input signal to the gates of reference cells in a subset and generates a digital signal according to which reference cells conduct. In particular, when the analog input signal is applied, each reference cell has a binary state, either conductive or non-conductive, and generation of the digital signal simply requires digital encoding of binary signals indicating the states of the reference cells. With this approach, the ADC does not require comparators which can significantly reduce the size, power consumption, and the conversion time of the ADC. A DAC that contains a conversion array selects a memory cell corresponding to a digital input value and reads the selected memory cell to generate an analog output signal having a voltage equal to the threshold voltage of the memory cell. The DAC can use the same conversion array as an ADC to ensure that the DAC inverts the conversion that the ADC performs.
The conversion array may include ROM cells where the structure (e.g., channel dopant concentration) of each ROM cell sets the cell's threshold voltage or electrically programmable non-volatile memory cells. The set of threshold voltage in the conversion array controls the conversion or conversions implemented. In particular, a converter can implement linear and/or non-linear conversions. Electrically programming the threshold voltages of memory cells in a conversion array allows selection or changes in the conversion if an application of the converter so requires. An end user or a supplier of converter integrated circuits can use a programmer or an automatic tester with appropriate software to program or reprogram a converter when required.
One embodiment of the invention is a converter that includes a plurality of transistors having a plurality of different threshold voltages. For analog-to-digital conversions, an input circuit for the converter applies an analog input signal to gates of the transistors, and an encoder generates a digital output signal that represents a value that depends on which of the transistors conduct when the analog input signal is applied. The transistors are typically floating gate transistors or other transistors having programmable threshold voltages, and the transistors may be in an array including multiple rows and columns of memory cells. In one embodiment, the transistors are in a conversion
Majestic, Parsons, Siebert & Hsue
SanDisk Corporation
Williams Howard L.
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