Programmable array logic cell

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307465, G06F 738, H03K 19173

Patent

active

047899514

ABSTRACT:
A programmable array logic cell 60 including a sum-of-products array having a single OR gate 70 for providing a sum signal, and including an XOR gate 80 for combining the sum signal with a product signal provided by an AND gate 78 from selected array input and/or feedback signals. The product signal can be the previous state output signal Q for a JK flip flop configuration, or a forced high or low signal for other configurations for programmable output signal polarity.

REFERENCES:
patent: 4124489 (1978-11-01), Birkner et al.
patent: 4644192 (1987-02-01), Fisher
patent: 4677318 (1987-06-01), Veenstra
patent: 4684830 (1987-08-01), Tsui et al.

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