Programmable architecture analog-to-digital converter

Details Programmable architecture analog-to-digital converter Programmable architecture analog-to-digital converter

2002-12-23

2004-07-13

Williams, Howard L. (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

Reexamination Certificate

active

06762707

ABSTRACT:

TECHNICAL FIELD
The present invention relates to the field of converting analog signals to digital signals. More specifically, the present invention relates to highly flexible devices used to convert an analog signal into a digital representation.
BACKGROUND
Analog-to-Digital converters or ADC's are used in a wide variety of electronic applications including, but not limited to, communications, imaging, measurement, control systems, sensors, etc. In general, ADC's may be used in any application in which it is desirable for an analog signal, i.e., a continuous electrical signal, to be digitally processed.
The converting of an analog signal to its digital counterpart is accomplished by repeatedly sampling a continuous analog signal, i.e., checking the voltage level at a fixed time, and outputting a digital approximation of each sample. Accordingly, there are two basic parameters that define ADC performance: sample rate, i.e., how often samples of the analog signal are made, and accuracy, i.e., how close the digital approximation is to the analog signal for each sample.
The benefits of converting an analog signal to its digital representation include, but are not limited to, noise reduction and the ability to use computers and computing software to analyze and manipulate the signal, etc.
There are a variety of ADC architectures that may be used to convert an analog signal to its digital counterpart. Several well known ADC architectures include, Integrating, Oversampling, Successive Approximation, Hybrid Successive Approximation, Flash, and Pipeline architectures. The Integrating and Oversampling architectures provide low to medium sample rates with high accuracy. Successive Approximation and Hybrid Successive Approximation provide medium sample rates and medium accuracy. Flash and Pipeline architectures provide high sample rates and medium to low accuracy.
When implementing an ADC, the application normally determines which ADC architecture will be used. For example, while some applications may need high accuracy other architectures don't, but instead require high sample rate. As presently understood in the art, a tradeoff exists between sample rate and accuracy, i.e., the sample rate inversely affects the accuracy and vice versa.
Many product markets, whose products utilize ADC's, are highly competitive, e.g., semiconductor, communications, measurement equipment, etc. Therefore, the cost of and time requirement for implementing ADC's into an application plays an important role in determining which ADC architecture will be used.
In developing new electronic products and applications which use ADC's, there are often several stages of testing, production, troubleshooting, etc., during which changes are made to a product that may affect the ADC architecture being used. It is desirable to reduce the time and cost of changing from one ADC architecture to another as much as possible during this development process.
SUMMARY
In one of many possible embodiments, the present invention provides a method and system in which different ADC architectures can be realized through selectively connecting electronic components regularly used in a variety of ADC architectures.
Another embodiment of the present invention provides programmable connections between electronic components used in a variety of ADC architectures.


REFERENCES:
patent: 5107146 (1992-04-01), El-Ayat
patent: 5748133 (1998-05-01), Distinti
patent: 5877720 (1999-03-01), Setty et al.
patent: 2002/0105451 (2002-08-01), Gulati et al.

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