Programmable anti-fuses using laser writing

Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state

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438128, H01L21/82

Patent

active

059045078

ABSTRACT:
Disclosed is a method of fabricating a programmable antifuse structure wherein programming of the antifuse structure results in conducting paths which are confined within a finite predictable area. The method includes depositing an insulating layer over a field. Additionally, the method includes creating a via through a via area of the insulating layer to expose a programmable surface area of the field. The method also includes depositing an interlayer over the exposed programmable surface of the field, over sidewalls of the via, and over an extended surface region of the insulating layer, the extended surface region including the via area. The method includes depositing a first conducting layer over the interlayer. The method also includes etching in the extended surface region to the insulating layer; the etching is for confining formation of conductive paths to within the via area upon programming of the programmable antifuse structure. The method further includes depositing a second conducting layer over the via area.

REFERENCES:
patent: 5110754 (1992-05-01), Lowrey et al.
patent: 5700722 (1997-12-01), Sumz
patent: 5763299 (1998-06-01), McCollum et al.

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