Programmable ABIST microprocessor for testing arrays with two lo

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371 225, 365200, G11C 2900

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056617321

ABSTRACT:
Computer system element has a VLSI array with redundant areas and an ABIST (Array Built-In Self Test system). The ABIST controller allows self test functions (e.g. test patterns, read/write access, and test sequences) to be used with dual logical views to reduce test time. The ABIST generates pseudo-random address patterns for improved test coverage. A jump-to-third pointer control command enables branching to perform looping after a background has been filled. A data register is divided into multiple sections to enable a Walking/Marching pattern to be executed individually and concurrently in the dual views to further reduce test times.

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