Program-verify circuit and program-verify method

Details Program-verify circuit and program-verify method Program-verify circuit and program-verify method

1999-05-04

1999-12-28

Nguyen, Viet Q.

Static information storage and retrieval

Floating gate

Particular biasing

36518501, 36518524, 36523008, G11C 1140

Patent

active

060090154

ABSTRACT:
A program-verify circuit for an electrically re-writable memory cell which has a floating gate and a control gate and permits storage of a ternary or higher multi-valued data, the program-verify circuit comprising (1) a variable threshold voltage field-effect transistor having a plurality of input gate electrodes, and (2) a latch circuit, wherein the latch circuit is connected to one source/drain region of the variable threshold voltage field-effect transistor and is to be connected to the memory cell through a bit line, one of the input gate electrodes of the variable threshold voltage field-effect transistor is to be connected to the memory cell through the bit line, and a potential for controlling the conduction
on-conduction state of the variable threshold voltage field-effect transistor is to be applied to the rest of the input gate electrodes.

REFERENCES:
patent: 4612630 (1986-09-01), Rosier
patent: 5822248 (1998-10-01), Satori et al.

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