Program/erase selection for flash memory

Details Program/erase selection for flash memory Program/erase selection for flash memory

1988-02-17

1991-10-01

Gossage, Glenn

Boots, shoes, and leggings

3649278, 36494492, 3649542, 3649652, 36496576, 365218, G11C 11407

Patent

active

050539906

ABSTRACT:
A semiconductor flash EPROM/EEPROM device which includes a command port for receiving instruction on a data line and providing control signals to a memory for providing program and erase functions, a method to program and erase the memory. A program sequence is comprised of setting up a program command during a first write cycle, preforming a second write cycle to load address to address register and data to to a data register, programming during a program cycle and writing a program verify command during a third write cycle to verify the programmed data during a read cycle. An erase sequence is comprised of writing a setup erase command during a first write cycle, an erase command during a second write cycle providing the erasure during an erase cycle, writing the erase verify command during a third write cycle which also addresses the address of the memory and providing erase verification during a read cycle. Both the erase and program cycles provide for measured incremental erasing and programming.

REFERENCES:
patent: 4460982 (1984-07-01), Gee et al.
patent: 4752871 (1988-06-01), Sparks et al.
patent: 4763305 (1988-08-01), Kuo
patent: 4811294 (1989-03-01), Kobayashi et al.

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