Program counter update mechanism

Electrical computers and digital processing systems: processing – Instruction fetching

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G06F 926

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active

060353864

ABSTRACT:
A processor which includes a fetch program counter circuit and an execute program counter circuit is disclosed. The fetch program counter circuit provides less significant program counter value bits in addition to a fetch program counter value. The execute program counter circuit generates an execute program counter value using the less significant program counter value bits. The execute program counter circuit receives a plurality of less significant program counter bit values and selects a single less significant program counter bit value thus generating execute program counter values in a multiple pipeline processor.

REFERENCES:
patent: 3781808 (1973-12-01), Ahearn et al.
patent: 3875391 (1975-04-01), Shapiro et al.
patent: 4044338 (1977-08-01), Wolf
patent: 4155119 (1979-05-01), DeWard et al.
patent: 4179737 (1979-12-01), Kim
patent: 4200912 (1980-04-01), Harrington et al.
patent: 4384343 (1983-05-01), Morganti
patent: 4453212 (1984-06-01), Gaither
patent: 4727481 (1988-02-01), Auguille
patent: 4736288 (1988-04-01), Shintani et al.
patent: 4807115 (1989-02-01), Torng
patent: 4853889 (1989-08-01), Ditzel et al.
patent: 5056006 (1991-10-01), Archarya et al.
patent: 5131086 (1992-07-01), Circello et al.
patent: 5133062 (1992-07-01), Joshi et al.
patent: 5136697 (1992-08-01), Johnson
patent: 5155816 (1992-10-01), Kohn
patent: 5155820 (1992-10-01), Gibson
patent: 5185871 (1993-02-01), Frey et al.
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5226130 (1993-07-01), Favor et al.
patent: 5261063 (1993-11-01), Kohn
patent: 5274790 (1993-12-01), Suzuki
patent: 5325499 (1994-06-01), Kummer et al.
patent: 5367650 (1994-11-01), Sharangpani et al.
patent: 5390355 (1995-02-01), Horst
patent: 5404470 (1995-04-01), Miyake
patent: 5450560 (1995-09-01), Bridges et al.
patent: 5454117 (1995-09-01), Puziol et al.
patent: 5465373 (1995-11-01), Kahle et al.
patent: 5467473 (1995-11-01), Kahle et al.
patent: 5471593 (1995-11-01), Branigin
patent: 5546551 (1996-08-01), Kohn
patent: 5568624 (1996-10-01), Sites et al.
patent: 5574928 (1996-11-01), White et al.
patent: 5651125 (1997-07-01), Witt et al.
IBM Technical Disclosure Bulletin, vol. 32, No. 5A, Oct. 1989, pp. 33-36, XP 000048827, "Roll-Back Interrupt Method for Out-Of-Order Execution of System Programs".
Toyohiko Yoshida, et al., "The Approach to Multiple Instruction Execution in the GMICRO/400 Processor", IEEE, .COPYRGT.1991, pp. 185-195.
Michael Slater, "AMD's K5 Designed to Outrun Pentium", Microprocessor Report, Oct. 24, 1994, pp. 1, 6-11.
Gurindar S. Sohi, "Instruction Issue Logic for High-Performance, Interruptible, Multiple Functional Unit, Pipelined Computers", IEEE Transactions on Computers, vol. 39, No. 3, .COPYRGT.1990, pp. 349-359.
Tom R. Halfhill, "AMD K6 Takes on Intel P6", BYTE magazine, Jan. 1996, pp. 67-68, 70 and 72.
IEEE Computer Society Press, "1988 IEEE International Conference on Computer Design: VLSI in Computers & Processors," 1988, pp. 96-101.
IEEE Micro No. 4, "Implementing Precise Interruptions in Pipelined RISC Processors," Los Alamitos, CA, 1993, pp. 36-43.
IEEE Micro No. 3, "Architecture of the Pentium Microprocessor," Los Alamitos, CA, 1993, pp. 11-21.
IEEE Transactions on Computers, No. 5, "Implementing Precise Interrupts in Pipelined Processors," New York, NY, 1988, pp. 562-573.
IEEE Computer Society, The 11th Annual International Symposium on Computer Architecture, "Instruction Issue Logic For Pipelined Supercomputers," Ann Arbor, Michigan, 1984, pp. 110-118.
IEEE Computer Society, The 14th Annual International Symposium on Computer Architecture, "WISQ: A Restartable Architecture Using Queues," Pittsburgh, PA, 1987, pp. 290-299.

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