Prognostic cell for predicting failure of integrated circuits

Details Prognostic cell for predicting failure of integrated circuits Prognostic cell for predicting failure of integrated circuits

2007-09-18

2007-09-18

Karlsen, Ernest (Department: 2829)

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

C324S1540PB, C340S653000, C702S034000

Reexamination Certificate

active

10716686

ABSTRACT:
A prognostic cell is used to predict impending failure of a useful circuit or circuits in a host IC. Increasing the stress on the prognostic cell relative to the useful circuit shifts the failure distribution of the cell along the time axis. The relative amount of time between the useful circuit failure and prognostic cell trigger point is the “prognostic distance”. The prognostic distance is controlled by designing in the excess stress applied in test device(s), by setting the threshold for triggering in the comparison circuit or by both. Prediction accuracy is enhanced by using multiple test devices to oversample the underlying failure distribution and triggering the failure indicator when a certain fraction fail.

REFERENCES:
patent: 4833395 (1989-05-01), Sasaki et al.
patent: 5117113 (1992-05-01), Thomson et al.
patent: 5822218 (1998-10-01), Moosa et al.
patent: 6005407 (1999-12-01), Arabi et al.
patent: 6348806 (2002-02-01), Okandan et al.
patent: 6724214 (2004-04-01), Manna et al.
patent: 6873171 (2005-03-01), Reynick
patent: 7005871 (2006-02-01), Davies et al.
V. C. Tyree, “Self stressing rest structure cells”, Rome Laboratory, Air Force Materiel Command, Feb. 1995, New York.
T. P. Ma et al., “Ionizing Radiation Effects in MOS Devices and Circuits”, John Wiley and Sons, 1989.
G. Anelli et al., “Radiation tolerant VLSI circuits in standard deep submicron CMOS technologies for the LHC experiments: Practical design aspects,” IEEE Trans. Nucl. Sci., vol. 46, pp. 1690-1696, 1999.
G. S. Share, “Effects of Ionizing Radiation on Thin Oxide (20- 1500 Å) MOS Capacitors,” J. Appl. Phys., vol. 45, pp. 4894, 1974.
R. C. Lacoe et al., “Total-dose radiation tolerance of a commercial 0.35 mm CMOS process,” presented at Radiation Effects Data Workshop, 1998.
R. C. Lacoe et al., “Total-dose tolerance of a Chartered Semiconductor 0.35 mm CMOS process,” presented at Radiation Effects Data Workshop, 1999.
R. C. Lacoe et al., “Application of Hardness-By-Design Methodology to Radiation-Tolerant ASIC Technologies,” IEEE Trans. Nucl. Sci., vol. 47, pp. 2334-2341, 2000.
R. C. Lacoe et al., “Total-dose tolerance of the commercial Taiwan Semiconductor Manufacturing Company (TSMC) 0.35 mm CMOS process,” presented at Radiation Effects Data Workshop, 2001.
J. W. R. Dawes et al., “Process technology for radiation-hardened CMOS integrated circuits,” IEEE J. Solid State Circuits, vol. SC-11, pp. 459, 1976.
J.M. Benedetto et al., “Mosfet and MOS Capacitor Responses to Ionizing Radiation” IEEE Transactions on Nuclear Science, vol. NS-31, No. 6, Dec. 1984.
A. Mekkaoui et al., “30Mrad(SiO2) radiation tolerant pixel front end for the BTEV experiment,” Nucl. Instr. and Meth. A, vol. 465, pp. 166-175, 2001.
J. D. M. Fleetwood, “A Reevaluation of Worst-Case Post-irradiation Response for Hardered MOS Transistors,” IEEE Trans. Nucl. Sci., vol. NS-34, p. 1178, 1987.
K. P. V. Dressendorfer, “The Effects of Test Conditions on MOS Radiation Hardness Results,” IEEE Trans. Nucl. Sci., vol. NS-28, p. 4281, 1981.
M. Kimura, “Field and Temperature acceleration model for time-dependent dielectric breakdown,” IEEE Trans. Electron Devices, vol. 46, pp. 220-229, 1999.

Affiliated with

Also associated with

Rating

Prognostic cell for predicting failure of integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Prognostic cell for predicting failure of integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Prognostic cell for predicting failure of integrated circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3727043