Fishing – trapping – and vermin destroying
Patent
1992-02-20
1993-01-26
Chaudhuri, Olik
Fishing, trapping, and vermin destroying
437 41, 437 44, 437912, 437944, 148DIG100, 257282, H01L 21265
Patent
active
051822180
ABSTRACT:
The present invention relates to a method of making a compound semiconductor device having a high performance self-aligned LDD structure which has stable characteristics, and is suitable for high integration and high yield, in which after forming a channel layer beneath the substrate surface, using a high performed self-aligned technology, a gate electrode, lightly doped layers and heavily doped layers are formed in predetermined positions by a photolithography for the gate portion. This process of a photolithography is performed only once, therefore, each pattern can be formed with excellent accuracy and reproducibility.
REFERENCES:
patent: 4472872 (1984-09-01), Toyoda et al.
patent: 4509991 (1985-04-01), Tour
patent: 4855246 (1989-08-01), Codella et al.
Chaudhuri Olik
Pham Long
Sumitomo Electric Industries Ltd.
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