Stock material or miscellaneous articles – Composite – Of silicon containing
Reexamination Certificate
2000-11-07
2003-04-08
Jones, Deborah (Department: 1775)
Stock material or miscellaneous articles
Composite
Of silicon containing
C428S064100, C117S003000, C117S931000
Reexamination Certificate
active
06544656
ABSTRACT:
TECHNICAL FIELD
The present invention relates to a method for producing a silicon wafer of high resistivity and high gettering ability wherein a silicon wafer produced by the Czochralski method is subjected to a heat treatment, and a silicon wafer having such characteristics, as well as a method for producing a silicon wafer wherein generation of slip dislocations, which are likely to be generated in a heat treatment process such as one in a device production process, can be suppressed, and a silicon wafer having such characteristics.
BACKGROUND ART
Silicon wafers of high resistivity produced by the floating zone method (FZ method) have conventionally been used for power devices such as high-voltage power devices and thyristors. However, it is difficult to produce a silicon wafer having a diameter of 200 mm by the FZ method, and it is impossible to produce one having a diameter of 300 mm or more by currently used techniques. Further, the planar resistivity distribution of usual FZ wafers is inferior to that of CZ wafers with respect to both of the macroscopic resistivity distribution and the microscopic resistivity distribution. As a method for improving this situation, there is a method utilizing neutron irradiation. However, this method can produce only N-type wafers, and moreover suffers from a drawback that increased cost is invited.
On the other hand, by the Czochralski method (CZ method), wafers of excellent planar resistivity distribution can be produced. In addition, wafers of a large size having a diameter of 200 mm or 300 mm are already produced by this method, and it is considered to be well possible to produce those having a diameter of about 400 mm or more. Therefore, silicon wafers produced by the CZ method will be promising in the future.
In particular, recent semiconductor devices for mobile communications and the latest C-MOS devices require decrease of parasitic capacity, and for this reason, silicon wafers of a large diameter and high resistivity are required. Further, there has been reported the effect of use of a high resistivity substrate on signal transmission loss or decrease of parasitic capacity in Schottky barrier diodes. Therefore, there is required a method for producing wafers of high resistivity (at least 100 &OHgr;·cm) by the CZ method.
Furthermore, in order to obtain such semiconductor devices as mentioned above with still higher performance, the so-called SOI (Silicon On Insulator) wafers may be used. As a representative method for producing such SOI wafers, there is the wafer bonding method. This method comprises a step of bringing a bond wafer, which serves as a device forming layer, into close contact with a base wafer, which serves as a support substrate, via an oxide film, a step of subjecting them to a heat treatment so that the both should be firmly bonded, and a step of making the bond wafer into a thin film as an SOI layer. As also for the case where semiconductor devices are produced by using bonding SOI wafers produced by such a method, it is required to use wafers of high resistivity produced by the CZ method as base wafers in order to solve the problems such as the production of wafers of a large diameter and the signal transmission loss.
However, since the CZ method utilizes a crucible made of quartz, not a small amount of oxygen (interstitial oxygen) is introduced into a silicon crystal. Although such oxygen atoms are usually electrically neutral when they exist alone by themselves, if they are subjected to a heat treatment at a low temperature of around 350 to 500° C., a plurality of them gather to release electrons and become electrically active oxygen donors. Therefore, if a wafer obtained by the CZ method is subsequently subjected to a heat treatment at about 350 to 500° C. in the device production process and so forth, it may suffer from a problem that resistivity of a high resistivity CZ wafer is reduced due to the formation of the oxygen donors.
One of the methods for preventing the resistivity reduction due to the above oxygen donors and obtaining a silicon wafer of high resistivity is the method for producing a silicon single crystal having a low interstitial oxygen concentration from an initial stage of the crystal growth.
Japanese Patent Publication No. 8-10695 discloses that, as a method for producing a wafer of high resistivity by the CZ method, a silicon single crystal having a high resistivity of 1000 &OHgr;·cm or higher can be produced by preparing a silicon single crystal of a low interstitial oxygen concentration through the magnetic field applied CZ method (the MCZ method). Further, Japanese Patent Laid-open Publication No. 5-58788 discloses that a silicon single crystal can be produced with a high resistivity of 10000 &OHgr;·cm or higher by performing the MCZ method using a synthetic quartz crucible.
As another method for producing wafers of a high resistivity by the CZ method, there has also been proposed a method conversely utilizing the phenomenon of the oxygen donor formation, wherein a P-type silicon wafer of a low impurity concentration and low oxygen concentration is subjected to a heat treatment at 400 to 500° C. to generate oxygen donors, and P-type impurities in the P-type silicon wafer is compensated by these oxygen donors so that the wafer should be converted into N-type to produce an N-type silicon wafer of high resistivity (Japanese Patent Publication No. 8-10695).
However, a silicon single crystal of a low interstitial oxygen concentration produced by the MCZ method or the like as mentioned above suffers from a drawback that the density of bulk defects generated by a heat treatment in the device production process becomes low, and sufficient gettering effect will be unlikely to be obtained. In devices of a high integration degree, it is essential to impart gettering effect by a certain amount of oxygen precipitation.
Further, the method of obtaining a silicon wafer of high resistivity by generating oxygen donors by a heat treatment and compensating P-type impurities in the wafer to convert it into N-type is a complicated method that requires accurate control of initial resistivity (concentration and kind of impurities) and heat treatment time, and a heat treatment for a long period of time. Moreover, this method cannot provide P-type silicon wafers of high resistivity. In addition, resistivity of wafers obtained by this method may also vary depending on a subsequent heat treatment. Furthermore, in this method, if a high interstitial oxygen concentration is used, it becomes difficult to control the wafer resistivity. Therefore, this method suffers from a drawback that a low initial concentration of interstitial oxygen in a silicon wafer must be used, and the gettering effect of the wafer becomes low.
While semiconductor devices for mobile communications or the latest C-MOS devices require silicon wafers of a large diameter and high resistivity produced by the CZ method as described above, integrated circuits such as usual LSI are also produced with silicon wafers mainly produced by the CZ method and having a usual resistivity (about 1-20 &OHgr;·cm) and through a production process comprising a large number of production steps including several heat treatment steps other than the aforementioned heat treatment of the device production process. These heat treatment steps are very important steps, in which performed are, for example, formation of an oxide film on a wafer surface layer, diffusion of impurities, formation of denuded zone and gettering layer and so forth.
As a resistance heating type heat treatment furnace for a so-called batch processing, which is used for the aforementioned heat treatment process and can simultaneously anneal a plurality of wafers, there are a horizontal type furnace and a vertical type furnace. In the horizontal type furnace, wafers are loaded into the furnace while they are vertically held on a jig for holding wafers, called a boat, and subjected to a heat treatment. In the vertical type furnace, wafers are loaded into the furnace while they are horizontally held
Abe Takao
Aihara Ken
Akiyama Shoji
Hayamizu Yoshinori
Igarashi Tetsuya
Jones Deborah
Shin-Etsu Handotai & Co., Ltd.
Stein Stephen
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