Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
1999-04-23
2002-05-07
Malzahn, David H. (Department: 2121)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
C708S319000
Reexamination Certificate
active
06385635
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a product sum operation device and, more particularly, to a product sum operation device that is capable of carrying out a fast product sum operation with real and complex numbers.
With recent increase in capacity and function in the communication industry, faster processing becomes more and more important for modulation/demodulation, Fourier transform, and base band transmission. These types of processing uses a product sum operation with the real and complex numbers. For the product sum operation with complex numbers, a single operation involves in four-time multiplication, three-time addition, and one-time subtraction of real numbers. A larger sampling frequency results in a shorter processing time available for a single product sum operation with the real numbers. Thus such a product sum operation device is essential that is capable of carrying out an operation with real and complex numbers at a higher speed.
The product sum operation device for a faster product sum operation is disclosed in, for example, Japanese Patent Laid-open No. 9-269939. As will be described more in detail below, the product sum operation device disclosed expedites the product sum operation with the real and complex numbers by means of two parallel processing of multiplication and addition. However, the increase in speed to this extent may not be sufficient to provide a satisfactory performance with a possible larger capacity required for communications in the future. Furthermore, the product sum operation device disclosed has a rather complex configuration of an input section including two delay elements and two multiplexers.
SUMMARY OF THE INVENTION
Therefore, an object of the present invention is to provide a product sum operation device that is capable of carrying out a fast product sum operation with real and complex numbers.
Another object of the present invention is to provide a product sum operation device having a relatively simple configuration.
A product sum operation device according to the present invention achieves a fast product sum operation with real and complex numbers by means of increasing the number of arithmetic operation units and data transfer units to thereby increase the level of parallelism.
The product sum operation device according to a first aspect of the present invention comprises a data transfer section for transferring four data simultaneously; and first through fourth multipliers adapted to receive two data that are assigned in advance out of the four data transferred from the data transfer section to carry out a multiplication operation with the two data received. The product sum operation device further comprises a first adder-subtracter for carrying out adding and subtracting operations with the multiplication results obtained by the first and second multipliers; a second adder-subtracter for carrying out adding and subtracting operations with the multiplication results obtained by the third and the fourth multipliers; and first and second accumulators. The product sum operation device further comprises a first adder for adding the addition result obtained by the first adder-subtracter to a value previously stored in the first accumulator to give the addition result to the first accumulator as a new value; and a second adder for adding the addition result obtained by the second adder-subtracter to a value previously stored in the second accumulator to give the addition result to the second accumulator as a new value.
A product sum operation device according to a second aspect of the present invention comprises a data transfer section for transferring four data simultaneously; and first through fourth multipliers provided correspondingly to one of the four data transferred from the data transfer section to calculate square of the data transferred. The product sum operation device further comprises a first adder-subtracter for carrying out adding and subtracting operations with the multiplication results obtained by the first and second multipliers; a second adder-subtracter for carrying out adding and subtracting operations with the multiplication results obtained by the third and the fourth multipliers; and first and second accumulators. The product sum operation device further comprises a first adder for adding the addition result obtained by the first adder-subtracter to a value previously stored in the first accumulator to give the addition result to the first accumulator as a new value; and a second adder for adding the addition result obtained by the second adder-subtracter to a value previously stored in the second accumulator to give the addition result to the second accumulator as a new value.
A product sum operation device according to a third aspect of the present invention comprises first through fourth buses for transferring first through fourth data; and first through fourth multiplexers connected to two buses out of the first through the fourth buses that are assigned in advance. The first through the fourth multiplexers are for selecting, in response to a selection signal, one of the data transferred over the two buses in accordance with the selection signal to produce selected data. The product sum operation device further comprises a first multiplier for multiplying the data transferred over the first bus with the data supplied from the first multiplexer; a second multiplier for multiplying the data transferred over a second bus with the data supplied from a second multiplexer; a third multiplier for multiplying the data transferred over a third bus with the data supplied from a third multiplexer; and a fourth multiplier for multiplying the data transferred over the fourth bus with the data supplied from the fourth multiplexer. The product sum operation device further comprises a first adder-subtracter for carrying out adding and subtracting operations with the multiplication results obtained by the first and the second multipliers; a second adder-subtracter for carrying out adding and subtracting operations with the multiplication results obtained by the third and the fourth multipliers; and first and second accumulators. The product sum operation device further comprises a first adder for adding the addition result obtained by the first adder-subtracter to a value previously stored in the first accumulator to give the addition result to the first accumulator as a new value; and a second adder for adding the addition result obtained by the second adder-subtracter to a value previously stored in the second accumulator to give the addition result to the second accumulator as a new value.
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Harris Semiconductor: “Complex Filtering with the HSP43168 Dual FIR Filter”, Application Note AN9418.1, (1998), pp. 3-302-3-306, XP002160279.
Foley & Lardner
Malzahn David H.
NEC Corporation
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