Electrical computers and digital processing systems: processing – Instruction decoding – Decoding instruction to accommodate variable length...
Reexamination Certificate
2011-08-23
2011-08-23
Kindred, Alford W (Department: 2181)
Electrical computers and digital processing systems: processing
Instruction decoding
Decoding instruction to accommodate variable length...
Reexamination Certificate
active
08006071
ABSTRACT:
Methods and apparatus are provided for optimizing a processor core. Common processor subcircuitry is used to perform calculations for various types of instructions, including branch and non-branch instructions. Increasing the commonality of calculations across different instruction types allows branch instructions to jump to byte aligned memory address even if supported instructions are multi-byte or word aligned.
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Altera Corporation
Geib Benjamin P
Kindred Alford W
Weaver Austin Villeneuve & Sampson LLP
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