Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2003-01-22
2009-08-25
Malzahn, David H (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07580968
ABSTRACT:
A method of performing a scaled sum-of-product operation in a processor in response to multiply-and-accumulate (MAC) instructions. The method includes accessing a first number, accessing a second number, and accessing a shift value. The first number is multiplied by the second number, the resulting product comprising a third number that includes a most significant portion and a least significant portion. The method includes executing a first MAC instruction, executing a second MAC instruction, and storing a final result of the scaled sum-of-product operation. Executing the first MAC instruction comprises right-shifting the least significant portion of the third number according to the shift value; accessing a least significant portion of a fourth number; and adding the right-shifted least significant portion of the third number to the least significant portion of the fourth number, the resulting sum comprising a least significant portion of the final result of the scaled sum-of-product operation.
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TMS320C28X DSP CPU and Instruction Set Reference Guide, Aug. 2001, pp. 1-695, Texas Instruments, Inc., U.S.A.
Brady III Wade J.
Malzahn David H
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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