Processor with maximum and minimum instructions

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Reexamination Certificate

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07580967

ABSTRACT:
A method of operating a processor in a variable bit-length environment by performing a maximum limit function and minimum limit function. The method comprises accessing a most significant portion of a first number in a first register, wherein the most significant portion of the first number includes a first value. The method also includes accessing a most significant portion of a second number that includes a maximum/minimum limit, wherein the most significant portion of the second number includes a second value. The method includes changing the most significant portion of the first number to match the most significant portion of the second number if the first value is greater/less than the second value and storing the most significant portion of the first number in the first register.

REFERENCES:
patent: 5917740 (1999-06-01), Volkonsky
patent: 6219685 (2001-04-01), Story
patent: 6532486 (2003-03-01), Tessarolo
patent: 6535900 (2003-03-01), Perets et al.
patent: 6718357 (2004-04-01), Ha
TMS320C28× DSP CPU and Instruction Set Reference Guide, Aug. 2001, pp. 1-695, Texas Instruments, Inc., U.S.A.

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