Processor with different width functional units ignoring...

Details Processor with different width functional units ignoring... Processor with different width functional units ignoring...

1999-06-30

2002-08-27

Kim, Kenneth S. (Department: 2183)

Electrical computers and digital processing systems: processing

Instruction decoding

Decoding instruction to accommodate variable length...

C710S305000, C710S307000, C712S221000

Reexamination Certificate

active

06442676

ABSTRACT:

FIELD OF THE INVENTION
The present invention generally relates to data processing systems, and more specifically to computer processors capable of supporting 32, 36, or 48 bit instructions installable and communicating using 64 bit industry standard busses and peripherals.
BACKGROUND OF THE INVENTION
There are millions of lines of code in existence that execute on proprietary hardware. For example, the assignee herewith sells GCOS® 8 hardware and software. GCOS® 8 is a proprietary thirty-six (36) bit system. Another proprietary thirty-six (36) bit system is the 1100/2200 systems sold by Unisys Corporation. A number of companies sell proprietary thirty-two (32) bit systems.
The cost of continuously developing ever more powerful proprietary systems continues to increase. Part of the cost of developing follow-on proprietary systems is the cost of developing custom I/O interfaces and the like. Continuous development in this area is extremely expensive.
It would thus be advantageous to have a system where NARROW legacy code can be easily executed, while still being able to utilize industry standard components.


REFERENCES:
patent: 4542476 (1985-09-01), Nagafuji
patent: 5155820 (1992-10-01), Gibson
patent: 5652900 (1997-07-01), Yoshida
patent: 5903772 (1999-05-01), White et al.
patent: 6189090 (2001-02-01), Tan et al.

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