Processor traffic segregation for network switching and routing

Details Processor traffic segregation for network switching and routing Processor traffic segregation for network switching and routing

2006-01-03

2009-12-22

Ferris, Derrick W (Department: 2416)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

Reexamination Certificate

active

07636356

ABSTRACT:
An apparatus having a corresponding method and computer program comprises network interfaces; a processor interface; a control circuit to remove the processor interface from associations between the interfaces and a domain; a classifier to assign codes to packets addressed to the processor interface, wherein the each code represents a protocol and comprises a flag; an allowance circuit to set the flag in the code for a packet when the packet comprises a protocol associated with the network interface that is the source of the packet, and to clear the flag otherwise; and an egress circuit to receive packets addressed to the processor interface, to drop the received packets having a code comprising a flag that is clear, and to transfer the received packets having a code comprising a flag that is set to the processor interface.

REFERENCES:
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patent: 6356951 (2002-03-01), Gentry, Jr.
patent: 7106752 (2006-09-01), Yamada
patent: 7298707 (2007-11-01), Retana et al.
patent: 7362702 (2008-04-01), Terrell et al.
patent: 7415034 (2008-08-01), Muller et al.
patent: 2007/0058556 (2007-03-01), Hilla et al.

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