Processor to efficiently rename decoded condition codes and...

Details Processor to efficiently rename decoded condition codes and... Processor to efficiently rename decoded condition codes and...

2007-09-11

2007-09-11

Sparks, Donald (Department: 2181)

Electrical computers and digital processing systems: processing

Dynamic instruction dependency checking, monitoring or...

C712S217000

Reexamination Certificate

active

10347359

ABSTRACT:
A following CC read instruction which is decoded simultaneously with a previous CC update instruction is developed into a multiflow. The first flow is set to a no-operation. A CC renaming update is executed by a CC renaming map update processing unit by the decoding of the previous CC update instruction. The resultant instruction is stored into a CC read instruction multiflow instruction word register. At the next second flow, the CC read instruction is issued from the multiflow instruction word register and, in a state where another instruction is not simultaneously issued, a CC renaming map is referred to by a CC renaming map reference processing unit by the decoding of the CC read instruction.

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