Processor system including a paging processor for controlling pa

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Details

36424341, 36423221, 3642563, G06F 1516, G06F 1210, G06F 1300

Patent

active

049741454

ABSTRACT:
A vector processor having a scalar procesing unit, a vector processing unit, a main storage unit, an extended storage unit, a storage control unit, and a paging processor unit, in which the storage control unit address translation for an access request from the vector processing unit to the main storage unit and includes a circuit for storing a kind of an access request issued for each storage location of the main storage the paging processor unit includes a circuit operative in response to issuance of an access request for data in a logical address space not existing in the main storage unit for interrupting a vector access request related thereto from the vector processing unit, a circuit for releasing the interruption according to an instruction, a circuit for loading the main storage unit with requested data of a logical address space existing in the extended storage unit, and a circuit for detecting an area of the main storage having a lower access frequency so as to move data from the area into the extended storage unit. A microprogram is used to execute programming of an algorithm to achieve a data transfer between the main storage unit and the extended storage unit.

REFERENCES:
patent: 4186438 (1980-01-01), Benson et al.
patent: 4612612 (1986-09-01), Woffinden et al.
patent: 4630230 (1986-12-01), Sundet

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