Patent
1995-06-07
1997-09-30
Lall, Parshotam S.
395182, 395183, 395800, G06F 900, G06F 930
Patent
active
056734085
ABSTRACT:
A data processor and associated method for taking and returning from traps speculatively. The data processor supports a predefined number of trap levels for taking nested traps each having a corresponding trap level. The data processor comprises means to form checkpoints, means to back up to the checkpoints, means to take a trap, means to return from a trap, registers, and a trap stack unit. The registers have contents that define the state of the data processor each time a trap is taken. The trap stack unit includes a trap stack data storage structure that has a greater number of trap slack storage entries than there are trap levels. It also includes a freelist unit that maintains a current availability list of the trap stack storage entries that are currently available for mapping to one of the trap levels. The freelist unit identifies, each time a trap is taken, a next one of the currently available trap stack storage entries for mapping to the corresponding one of the trap levels. The trap stack unit further includes read/write logic that writes, for each trap taken, the contents of the registers to the next one of the currently available trap stack storage entries. It still further includes rename mapping logic that maintains a current mapping of each trap level to one of the trap stack storage entries. The rename mapping logic replaces, each time a trap is taken, an old mapping of the corresponding trap level to one of the trap stack storage entries with a current mapping of the corresponding trap level to the next one of the currently available trap stack storage entries. The trap stack unit also includes a resource reclaim unit that maintains an unavailability list of each trap stack storage entry not currently mapped to one of the trap levels by the current mappings but unavailable for mapping to one of the trap levels. The resource reclaim unit adds to the unavailability list, each time a trap is taken, the trap stack storage entry that was mapped to the corresponding trap level by the old mapping and removing from the unavailability list, each time a taken trap can no longer be undone, the trap stack storage entry that was mapped to the corresponding trap level by the old mapping. The freelist unit adds each trap stack storage entry removed from the unavailability list to the current availability list. Finally, the trap stack unit includes a checkpoint storage unit that includes checkpoint storage entries. Each formed checkpoint has a corresponding checkpoint storage entry so that the checkpoint storage unit stores, for each formed checkpoint, the current mappings of the rename mapping logic and the current availability list of the freelist unit in the corresponding checkpoint storage entry. For each backup to a checkpoint, the rename mapping logic replaces the current mappings it maintains with the mappings stored in the corresponding checkpoint storage entry and the freelist unit replaces the current availability list it maintains with the availability list stored in the corresponding checkpoint storage entry.
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Mike Johnson, Superscalar Microprocessor Design, 1991.
Osone Hideki
Shebanow Michael C.
HaL Computer Systems, Inc.
Lall Parshotam S.
Najjar Saleh
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