Processor having an adaptable operational frequency

Pulse or digital communications – Synchronizers – Synchronizing the sampling time of digital data

Reexamination Certificate

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Details

C370S503000, C327S154000, C327S162000

Reexamination Certificate

active

06792060

ABSTRACT:

FIELD OF THE INVENTION
The invention relates to a communication system comprising at least a transmitter and a receiver, which receiver comprises:
an analog/digital converter for sampling an input signal at a frequency supplied by a sampling clock,
a processor for processing sampled data at a frequency provided by an operational clock,
a clock generator for generating said operational clock as a function of the sampling clock.
The invention also relates to:
a receiver, and
a processing device for digital data which were previously sampled at a frequency provided by a sampling clock, which device comprises a clock generator for generating an operational clock, which is to be used for processing said data, as a function of said sampling clock.
BACKGROUND OF THE INVENTION
U.S. Pat. No. 4,617,599 describes an electronic equipment provided with a processor for handling digital data. This processor is capable of processing data sampled with a frequency which forms part of a finite set of given frequencies. The solution proposed in this document comprises the use of a specific local oscillator for each sampling frequency which can be handled by the processor. Each local oscillator generates a reference signal. A selection circuit selects a reference signal as a function of the sampling frequency of the data to be processed. The selected reference signal serves to produce the clock signal used by the processor for the data processing.
The invention has for its object to provide an operational clock for a processor for processing data which were sampled with a sampling clock whose frequency may have various values which are not necessarily known beforehand. Since the sampling frequencies which may be used are not known in advance, the solution proposed in the cited U.S. Pat. No. 4,617,599 is not applicable.
SUMMARY OF THE INVENTION
A communication system, a receiver, and a processing device according to the invention as described in the opening paragraphs are characterized in that said generator comprises means for generating said operational clock from a basic clock such that said operational clock has a constant integer number of active periods during one cycle of the sampling clock.
The invention thus consists in that an operational clock is generated from a single basic clock, the former having a constant relation with a sampling clock. In particular, this renders it possible for the processor to know when the sampled data are available in a time reference provided by its operational clock.


REFERENCES:
patent: 4298985 (1981-11-01), Ballard et al.
patent: 4612573 (1986-09-01), Grallert et al.
patent: 4617599 (1986-10-01), Noguchi et al.
patent: 4797845 (1989-01-01), Stikvoort
patent: 5317602 (1994-05-01), Onoda et al.
patent: 0 512 619 (1992-11-01), None

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