Processor for digital data

Details Processor for digital data Processor for digital data

1999-03-01

2003-02-18

Ghayour, Mohammad H. (Department: 2734)

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

C375S262000, C375S265000, C714S795000

Reexamination Certificate

active

06522705

ABSTRACT:

BACKGROUND
The present invention relates generally to receiving and reconstructing digital signals.
To recover data from a magnetic disk, a head reads data stored on the disk as a stream of individual analog pulses. An analog to digital converter converts the pulses to reconstruct the digital data stream. Due to pulse interference and noise, the reconstructed data stream may contain errors.
To aid in the detection and correction of errors, data can be encoded prior to storing the data on the magnetic disk. Encoding provides additional information to a disk reader, which aids in detecting errors generated by analog to digital conversions.
In convolution encoding, each bit of the encoded data stream depends on several successive bits of the original data stream. Thus, the data stream subsequently produced by the analog to digital converter includes correlation information introduced by the encoding method. The analog to digital conversion may still result in errors due to noise and pulse interference, but the disk reader may employ the encoded correlation information to correct such errors. For example, the disk reader can employ a decoder that decodes the type of correlation information produced by the encoding. From the correlation information, the decoder can identify errors produced by the analog to digital conversion and generate a decoded digital data stream having fewer errors.
Conventional decoders use a Viterbi algorithm to decode the digital data sequence generated by convolution encoding. The Viterbi algorithm requires checking for correlations in long sequences of digital data. Thus, Viterbi decoders require substantial hardware and large memories, which can be costly.
The memory requirements of Viterbi decoders grow approximately exponentially with the size of correlations introduced during encoding. Thus, high data storage densities and/or high disk read rates generally require expensive Viterbi decoders with large memory and hardware needs.
SUMMARY
The original encoding of correlation information determines the type of Viterbi detector needed to decode the digital data sequences produced by analog to digital conversion. High storage densities and transmission densities can introduce additional correlations into the data. At high densities, one may need to account for such correlations by decoding with a Viterbi decoder, which is adapted to data having the additional correlations.
In a first aspect the invention provides an apparatus for decoding a coded digital data sequence. The apparatus includes a Viterbi decoder, a first filter and a second filter. The Viterbi decoder generates a decoded sequence from the coded digital data sequence. The first filter generates a first error signal in response to receiving the decoded sequence. The second filter generates a second, different error signal in response to receiving the decoded sequence.
In some embodiments, the Viterbi decoder has a first response type and the first and second error signals indicate differences between the first decoded sequence and second and third decoded sequences. The second and third decoded sequences correspond to probable sequences produced by Viterbi decoders having respective second and third responses. In some preferred embodiments, the first, second, and third responses may be the PR4, the EPR4, and the (1−D
2
)(2+D+0.5D
2
) responses, respectively. The decoder may also include a correction module to correct the first decoded sequence to the probable sequence in response to an error signal from either the first filter or the second filter. The correction module may correct the decoded sequence in response to the probability of a difference between the decoded sequence and one of the probable sequences being maximal in a preselected time window.
In some embodiments, the first and second filters are connected to receive a signal from the Viterbi decoder, which indicates an error in the coded digital data sequence. The first and second filters generate the respective first and second error signals if the error belongs to a preselected class of error events. The preselected class may include more than three types of error events.
In a second aspect, the invention provides a decoder for digital signals. The decoder includes a Viterbi decoder, a subtractor, and a matched filter. The Viterbi decoder receives a coded input signal and produces a decoded digital signal from the coded input signal. The subtractor is coupled to receive the coded input signal and the decoded digital signal and to produce an error signal indicative of a difference between a coded version of the decoded digital signal and the coded input signal. The matched filter is coupled to receive and compare the decoded signal and the error signal and to produce an adjustment signal in response to determining that the error signal and the decoded signal correspond to different input signals. The adjustment signal indicates an error in producing the decoded signal from the input signal.
In some embodiments, the adjustment signal indicates a difference between the decoded digital signal and a second decoded digital signal that would be produced by a second Viterbi decoder for a different response. For example, the adjustment signal may indicate the probability that the second Viterbi decoder would generate the second decoded signal in response to receiving the coded input signal.
In some preferred embodiments, the first response is the PR4 response, and the second response is either the EPR4 response or the (1−D
2
) (1+D+0.5D
2
) response.
In some embodiments, the decoder also includes a correction module. The correction module receives the adjustment signal from the matched filter and corrects a decoding error in the first decoded digital signal in response to the adjustment signal. The correction module corrects a particular error when the particular error is the most probable error in a preselected time window.
In some embodiments, the matched filter compares the received error signal to three or more preselected types of error events.
In a third aspect, the invention provides a computer program product to decode an encoded data stream. The program product resides on a computer readable medium and includes instructions. The instructions cause a processor to decode a coded digital data sequence by a first Viterbi algorithm to produce a decoded sequence, to filter the decoded sequence to generate a first error signal, and filter the decoded sequence to generate a second, different error signal.
In some embodiments, the first and second error signals indicate differences between the decoded sequence and decoded sequences that correspond to probable sequences produced by Viterbi decoders having respective second and third response types.
In some embodiments, the program product further includes instructions for causing the processor to correct the decoded sequence to one of the probable sequences in response to one of the error signals. The instructions that cause the processor to correct may correct the decoded sequence in response to a difference between the decoded sequence and the one of the probable sequences being the most probable difference in a selected time window.


REFERENCES:
patent: 5521945 (1996-05-01), Knudson
patent: 5961658 (1999-10-01), Reed et al.
patent: 6052248 (2000-04-01), Reed et al.
patent: 6185173 (2001-02-01), Livingston et al.
patent: 6188735 (2001-02-01), Soichi et al.
Wood et al., “Viterbi Detection of Class IV Partial Response on a Magnetic Recording Channel”, IEEE Trans. on Communications, vol. COM-34, No. 5, May, 1986.

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