Processor event recognition

Details Processor event recognition Processor event recognition

1997-04-17

2000-11-14

Banankhah, Majid A.

Electrical computers and digital processing systems: multicomput

Computer-to-computer data routing

Least weight routing

709318, G06F 900

Patent

active

061483214

ABSTRACT:
A method and apparatus for the incorporation of additional processor generated events. The processor generally comprises a storage area, an indication unit, and a retriever. The storage area stores an indication. Upon recognition of each event, the indication unit alters the state of the indication--i.e., if an event is generated by the processor, the indication unit alters the state of the indication to a first state; and if an event is not generated by the processor, the indication unit alters the state of the indication to a second state. The retriever retrieves, in response to delivery of either a first processor generated event or a second non-processor generated event, a pointer which identifies a corresponding selector. This selector causes the processor to execute either a first number of instructions corresponding to the processor generated event or a second number of instructions corresponding to the non-processor generated event based on the indication.

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