Processor efficient transformation and lighting...

Details Processor efficient transformation and lighting... Processor efficient transformation and lighting...

2006-09-05

2006-09-05

Tung, Kee M. (Department: 2628)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C708S498000

Reexamination Certificate

active

07103621

ABSTRACT:
Efficient techniques for computation of texture coordinates using scaled conversion operations for a 3D graphics pipeline utilizing a scaled floating point to integer instruction and a scaled integer to floating point instruction to significantly reduce memory requirements. A parallel array VLIW digital signal processor is employed along with specialized scaled conversion instructions and communication operations between the processing elements, which are overlapped with computation to provide very high performance operation. Successive iterations of a loop of tightly packed VLIWs are used allowing the graphics pipeline hardware to be efficiently used.

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M. Strauss, M. Jacobs and I. Greenberg: “Bops: Conquering the Geometry Pipeline”, GDC 2000 Proceedings Archive, Programming Proceedings, 2000, pp. 1-18.

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