Processor controlled modifying of tabled input/output priority

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G06F 1326, G06F 946, G06F 300

Patent

active

048091642

ABSTRACT:
An apparatus determines the order of data communication between a plurality of peripheral devices that wish to do so and a central processor unit. Determination is made according to one of a number of selectable priority schedules. The apparatus is modifiable by programmed control so that certain of the peripheral devices can have their priorities reconfigured depending upon changing circumstances.

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