Processor controlled adjustment of line circuit transmission par

Details Processor controlled adjustment of line circuit transmission par Processor controlled adjustment of line circuit transmission par

1982-04-22

1985-07-16

Olms, Douglas W.

Multiplex communications

Wide area network

Packet switching

H04Q 1104

Patent

active

045300860

ABSTRACT:
A line switch for a digital telephone switching system utilizes distributed processing. The line switch comprises one or more switch modules. Each switch module is coupled to a central office switching system via one or more PCM lines which utilize common channel signaling. Each switch module comprises groups of line circuits, each line circuit being coupled to a subscriber line. Three separate distributed processor functions are provided in each line switch module. A first processor is utilized to communicate with the central office switching system is provided to control clock generation and rate conversion circuits. Each group of line circuits includes a third processor to control the operations of the line circuits and to gather information from the line circuit.
A test bus is routed to the line circuits. The third processor may be utilized to automatically measure and adjust various transmission parameters.

REFERENCES:
patent: 3761637 (1973-09-01), Henrion
patent: 4261051 (1981-04-01), Ohnishi et al.
patent: 4352180 (1982-09-01), Schulze
patent: 4377859 (1983-03-01), Dunning et al.
patent: 4382294 (1983-05-01), Beuscher et al.
H. Sueyoshi et al., "System Design of Digital Telephone Switching System-NEAX61," IEEE Trans. on Comm., vol. COM-27, No. 7, Jul. 1979, pp. 993-1001.
N. Vanner, "Architecture of System X, Part 2--The Digital Trunk Exchange", POEEJ, vol. 72, Oct. 1979, pp. 142-148.
J. Smith, "The Subscriber Line Card in a Distributed Control Switching System", ICC 1981, Jun. 14-18, 1981, pp. 1.1.1-4.

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