Processor architecture with processing clusters providing...

Details Processor architecture with processing clusters providing... Processor architecture with processing clusters providing...

2007-06-26

2011-11-15

Alrobaye, Idriss N (Department: 2183)

Electrical computers and digital processing systems: processing

Processing architecture

Array processor

C712S022000

Reexamination Certificate

active

08060725

ABSTRACT:
A processor architecture for multimedia applications includes processor clusters providing vectorial data processing capability. Processing elements in the processor clusters process both data with a bit length N and data with bit lengths N/2, N/4, and so on according to a Single Instruction Multiple Data (SIMD) function. A load unit loads into the processor clusters data to be processed according to a same instruction. An intercluster data path exchanges data between the processor clusters. The intercluster data path is scalable to activate selected processor clusters. The processor operates simultaneously on SIMD, scalar and vectorial data.

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